Computer Science IX · 2024 · Official answer key
| Question | Original SLO | Answer | Level |
|---|---|---|---|
| 1 | 1.1.1 | C | K |
| 2 | 1.1.2 | A | K |
| 3 | 1.1.3 | C | U |
| 4 | 1.3.1 | D | U |
| 5 | 1.3.2 | A | U |
| 6 | 1.3.3 | B | U |
| 7 | 1.3.4 | C | U |
| 8 | 1.3.6 | C | U |
| 9 | 1.3.7 | D,AEducator review noteOfficial 2024 AKU-EB Answer Key credits both D and A ("D,A"): Statement D ("Level 3 cache memory is smallest in storage capacity than other two levels") is FALSE because L3 cache is the largest in capacity, while Statement A ("Level 2 cache memory is located on the microprocessor") was historically considered false in older textbooks where L2 resided on the motherboard. | U |
| 10 | 1.3.8 | D | U |
| 11 | 1.3.9 | C | U |
| 12 | 2.1.2 | A | U |
| 13 | 2.1.2 | A | U |
| 14 | 2.1.3 | C | U |
| 15 | 2.2.2 | D | U |
| 16 | 2.2.1 | A | U |
| 17 | 3.1.2 | B | K |
| 18 | 3.1.3 | A | U |
| 19 | 3.1.4 | B | U |
| 20 | 3.1.7 | D | U |
| 21 | 4.1.4 | B | K |
| 22 | 4.1.6 | D | U |
| 23 | 4.2.1 | C | U |
| 24 | 4.2.2 | B | U |
| 25 | 4.3.1 | C | U |
| 26 | 4.4.1 | A | K |
| 27 | 4.4.3 | C | A |
| 28 | 5.1.2 | C | U |
| 29 | 5.1.4 | A | K |
| 30 | 5.1.5 | B | U |
| 31 | 5.2.1 | B | U |
| 32 | 5.2.1 | D | U |
| 33 | 5.2.3 | D | U |
| 34 | 5.3.1 | A | U |
| 35 | 6.3.1 | C | U |
| 36 | 6.3.2 | C | A |
| 37 | 6.5.3 | A | U |
| 38 | 6.5.3 | A | A |
| 39 | 6.6.1 | AEducator review notePrinted key PDF shows "•" (bullet glyph) due to font encoding; verified HTML anchor syntax answer is A (<a href="https://www.piac.com.pk">Visit PIA Website</a>). | A |
| 40 | 6.7.1 | A | K |
K: Knowledge · U: Understanding · A: Application and beyond
2024 Computer Science Paper 1 · answers & explanations →